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this is information on a product in full production. january 2015 docid027333 rev 1 1/27 HVLED001 offline controller for led lighting with constant voltage primary- sensing and high power factor datasheet - production data features ? quasi-resonant (qr) topology ? primary side regulation of output voltage ? direct optocoupler connection for current loop regulation with feedback disconnection detection and disable ? 800 v high voltage start-up ? high power factor and low thd in universal range ? high efficiency and outp ut stability in wide voltage and current range ? low start-up and quiescent current ? programmable minimum off time ? integrated input voltage detection for high power factor capab ility and protection triggering ? latch free device guarantee by smart autoreload timer (art) ? 0 - 10 and pwm dimming compatible ? remote control pin applications ? single stage led drivers with high power factor up to 75 w ? two stages led drivers up to 150 w description the HVLED001 is an enhanced peak current mode controller capable of controlling mainly high power factor (hpf) flyback or buck-boost topologies in led drivers having an output power up to 150 w. some other topologies, like buck, boost and sepic can also be implemented. st?s innovative high vo ltage technology allows direct connection of the HVLED001 to the input voltage in order to both start up the device and monitor the input voltage without the need for external components. advanced features are embedded to control either the output voltage or output current precisely and reliably using a reduced number of components, mainly passive. startup and light- load conditions are managed by dedicated operating schemes to improve the quality of output variable regulation in the final application. abnormal conditions such as open circuit, output short-circuit, input overvoltage/undervoltage, and circuit failures such as open loop and overcurrent of the main switch are effectively controlled. a smart auto-recover timer (art) function is built in to guarantee automatic application recovery, without loss of reliability. ssop10 table 1. device summary order code package packaging HVLED001 ssop10 tube HVLED001tr tape and reel www.st.com
contents HVLED001 2/27 docid027333 rev 1 contents 1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 typical application - hp f flyback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 typical electrical characteristi cs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.1 operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.1.1 start-up mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.1.2 active mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7.1.3 stop mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7.1.4 low consumption mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.1.5 soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.2 control loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.2.1 current sense input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.2.2 feedback input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.2.3 zero current detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.2.4 primary side regulation feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.2.5 burst-mode operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.3 gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.4 ic supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.4.1 vcc supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.4.2 high voltage start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.5 autorestart timer (art) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
docid027333 rev 1 3/27 HVLED001 contents 27 7.6 protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.6.1 overcurrent protection (ocp) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.6.2 input overvoltage protection (i-ovp) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.6.3 brownout protection (bo) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.6.4 optocoupler failure protection (ofp) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.7 disable and monitor feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
block diagram HVLED001 4/27 docid027333 rev 1 1 block diagram figure 1. block diagram 5 4 6 026 gulyhu *' =&' 7eodqn &6 )% 365orjlf 365($ +968 9&& 89/2 orjlf 95()365 72)) 2sh udwlrq door jlf prghvhohfwlrq surwhfwlrqv $57 &75/ +ljkyrowdjh vwduwxs ,qsxwyrowdjh vhqvlqj 'lvdeohorjlf ,&b',6 ,&b',6 %urzqrxw 6riwvwduw %urzqrxw =&'orjlf 3:0 frpsdudwru 6riwvwduw 9fvolp 2)3 2)3 2&3 2&3 *1' $0
docid027333 rev 1 5/27 HVLED001 typical application - hpf flyback 27 2 typical application - hpf flyback figure 2. typical application +968 9&& =&' *' &6 )% *1' &75/ +9/(' 5fv 5]fg 5ie &yff &odpslqj ghylfhv '6(& &rxw /(' /(' &9lq )lowhu dqg uhfwlilhu 5vv 72)) &vv 9uhi $0
pin settings HVLED001 6/27 docid027333 rev 1 3 pin settings figure 3. pin connection $0 table 2. pin description symbol pin description hvsu 1 high voltage start-up and input voltage detection. the pin, able to withstand 800 v, is to be tied to the input voltage using a low value resistor (1 k ? typ.). it embeds the internal start-up unit th at charges the capacitor connected between the v cc pin and gnd pin during the start-up and low consumption. during the operational mode, the voltage at this pi n is used to both measure the input voltage and detect input overvoltages. n.c. 2 not connected pin. toff 3 a blanking time for zero voltage detection can be set applying a voltage to this pin. a minimum blanking time is obtained leaving the pin unconnected. fb 4 input for loop regulation. the pin is intended to be directly driven by the phot otransistor (emitter-grou nded) of an optocoupler and / or to the compensation network related to the output voltage primary side regulation loop. an upper threshold vofp detects a failure of the optocoupler. the burst-mode and disable conditions are also related to the voltage applied to this pin. ctrl 5 this pin is used to disable the ic and generate the soft-start ramp. external active circuitry can be used to turn off the application. zcd 6 multiple function pin able to detect the zero curr ent instant, to sense the output voltage for primary side regulation and the input voltage for brownout detection. a negative-going edge triggers the mosfet's turn on, while an internal starter unit is active to generate the triggering signal when not externally available (e.g.: start-up). cs 7 input to the current sense comparator for the power regulation. a second level overcurrent (ocp) threshold detect s abnormal currents (e.g.: due to transformer's saturation) and, on this occurrence, activates th e second level overcurrent protection procedure. gnd 8 reference pin.
docid027333 rev 1 7/27 HVLED001 pin settings 27 gd 9 gate driver output. the output stage is able to drive the power mosfet's and igbt's gate. vcc 10 supply voltage of the ic. internal uvlo logic prevents the operation at volt ages that are insufficient for an efficient gate driving or signal processing. both a bulk capacitor (typically around 10 f) and a high frequency filter capacitor (100 nf ceramic, mounted as close as possible to the devi ce) are connected between this pin and gnd. internal clamp structure prevents accidental low energy spikes damaging the device. table 2. pin description (continued) symbol pin description
electrical data HVLED001 8/27 docid027333 rev 1 4 electrical data 4.1 absolute maximum ratings note: where not otherwise indicated the amr are intended when v cc > v cc,on . when v cc < v cc,on the minimum between the indicated value and v cc + 0.3 v has to be considered. 4.2 thermal data table 3. absolute maximum ratings symbol pin parameter test condition min. max. unit vhvsu,bd hvsu hvsu breakdown voltage ihvsu < 100 a, dc vcc = 15 v 800 v vhvsu,neg hvsu hvsu negative voltage ihvsu source < 2 ma - 0.3 v vgd gd maximum swing voltage - 0.3 v cc v vcs cs current sense applied voltage - 0.3 7 v vzcd zcd zcd pin voltage 7 v negative, isource < 1 ma - 0.3 v vfb fb fb voltage - 0.3 3.6 v vctrl ctrl ctrl voltage - 0.3 v cc v vcc,max vcc ic supply voltage 18 v vtoff toff maximum applied voltage - 0.3 7 v table 4. thermal data symbol parameter value unit r thja thermal resistance junction to ambient 120 c/w t j junction temperature operating range -40 to 125 c t stg storage temperature range -55 to 150 c
docid027333 rev 1 9/27 HVLED001 electrical characteristics 27 5 electrical characteristics t j = t a = 25 c production tested, v cc = 15 v, unless otherwise specified. table 5. electrical characteristics symbol pin parameter test condition min. typ. max. unit supply voltage v cc vcc operating range after turn on (1) 9.7 18 v v cc,on vcc turn on threshold (2) 12 13 14 v v cc,su vcc low consumption mode activation low consumption mode (2) 8.8 9.2 9.7 v start-up 2.2 3 3.8 v v cc,shd vcc v cc for ic reset low consumption (2) 7.8 8.5 9.2 v supply current istart-up vcc start-up current start-up, v cc < v cc,on 125 250 ? a icc vcc operating supply current stop mode, fb < vfb,dis 2.6 4 ma see figure 4: graph 1: v cc current consumption on page 13 iq vcc quiescent current low consumption mode, ctrl < vctrl,dis 330 480 ? a high voltage start-up generator vhv hvsu breakdown voltage ihv < 100 ? a 800 v vhv,op hvsu operating voltage range (1) vhv v vhvstart hvsu start voltage iv cc < 100 ? a 40 46 55 v icharge,su vcc initial charging current vhvsu > vhvstart, v cc < 2 v 0.15 0.5 0.9 ma icharge vcc v cc charge current vhvsu > vhvstart, start-up, v cc < v cc,on 23.45ma ihv, on hvsu on-state current vhvsu > vhvstart, v cc < 2 v 0.2 0.7 1.1 ma vhvsu > vhvstart, start-up, v cc < v cc,on 2.3 4 6 ihv, off hvsu off-state leakage current vhvsu = 400 v, active mode 18 35 ? a input voltage sensing vsurge hvsu surge protection threshold (3) 540 v tsurge hvsu max. stop state duration after surge vhvsu > vsurge (4) 91011ms feedback input vfb fb fb pin regulation voltage range active mode (1) 1.085 2.8 v vfb,ref fb fb reference voltage active mode (5) , (6) 1v
electrical characteristics HVLED001 10/27 docid027333 rev 1 kp fb multiplier gain active mode, vfb = 2.8 v, vhvsu = 300 v (6) 0.355 0.4 0.445 vfb,dis fb ic disabling threshold from fb falling edge 0.35 0.5 0.75 v ifbsrc fb fb pin pull-up current active mode, vzcd,off = 2.0 v, vfb = 1.65 v 1ma low consumption vfb = 0.7 v (3) 40 75 120 a ifbsnk fb fb pull down current active mode, vzcd,off = 2.7 v, vfb = 1.65 v (3) 90 230 350 a vbm fb burst-mode threshold active mode (5) 0.97 1.054 1.11 v tbm fb burst-mode repetition rate vfb = 0.8 v (4) 0.94 1.04 1.16 ms vofp fb optocoupler failure protection threshold active mode (5) 2.75 2.95 3.5 v tofp fb max. active mode duration after fb clamping vfb > vfb,max (4) 90 100 110 ms psr function vref,psr fb psr loop reference ta m b = 2 5 c (7) 2.55 2.6 2.65 v over all temperature range (3) , (7) 2.5 2.6 2.7 gm fb transconductance ? ifb = 10 a, vfb = 1.65 v (3) 1.3 2.3 3.2 ms current sense input (8) vcs,lim cs current sense reference clamp vhvsu = dc voltage, vfb = 3.3 v, 1.9 v < vctrl < 2.4 v 746 mv vcs,min cs current sense minimum level vhvsu,pk = 400 v (3) 60 mv vhvsu,pk = 130 v (3) 20 ics cs current sense pin bias current vcs = 500 mv (3) 2.5 5 a tleb cs leading edge blanking 130 200 340 ns vocp cs saturation protection threshold during ton 1 1.1 1.2 v tocp cs max. stop state duration after ocp tpulse = 1 s, amplitude 2 v (4) 0.94 1.04 1.16 ms vcs_ss cs vcs during ss vctrl = 0.7 v 280 348 450 mv vctrl = vctrl,bias vcs,lim zcd input vzcd,arm zcd zcd arming threshold positive-going edge (7) 0.42 0.5 0.6 v vzcd,trig zcd zcd triggering threshold negative-going edge (7) 0.24 0.3 0.38 v tblank zcd zcd blanking time vtoff > vtoff,fix (3) , (9) 3.2 s vtoff = 0 v (9) 120 200 290 s table 5. electrical ch aracteristics (continued) symbol pin parameter test condition min. typ. max. unit
docid027333 rev 1 11/27 HVLED001 electrical characteristics 27 vzcd,cl_l zcd zcd negative clamping voltage izcd src = 1 ma -230 -135 mv izcdb zcd zcd pin biasing current vzcd = 0.1 to 2.6 v (3) 1a ibo zcd brownout detection level sourcing during on time (3) 100 a tbo zcd brownout detection time izcd < ibo (4) 90 100 110 ms td,zcd zcd zcd propagation delay measured from last vzcd,trig crossing and gd rising edge (3) 300 ns timing trec recovery time after opto failure, analogue disable or brownout (4) 2.2 2.5 2.8 s gate driver vgdh gd output high voltage igd,source = 5 ma 14.5 v vgdl gd output low voltage igd,sink = 5 ma 0.1 v isource gd output source peak current vgd = 7.5 v (3) 0.3 a isink gd output sink peak current vgd = 7.5 v (3) 0.6 a tf gd fall time cgd = 1 nf, from 13.5 v to 1.5 v 15 ns tr gd rise time cgd = 1 nf, from 1.5 v to 13.5 v 30 ns vgd,shd gd maximum voltage during shutdown vcc < v cc,shd , igd = 2 ma 1 2 v ctrl input vctrl,dis ctrl disabling threshold negative-going edge (10) 0.4 0.5 0.6 v vadis ctrl timed disabling threshold (10) 2.4 2.6 2.85 v tadis ctrl max. operating interval after analog disable feature triggering vctrl > vadis (4) 90 100 110 ms vctrl,bias ctrl ctrl biasing voltage ta m b = 2 5 c (10) 1.85 2.05 2.25 v over whole temp. range (3) 1.75 2.35 ictrl,bias ctrl ctrl biasing current vctrl = 0 v 5 10 15 a rctrl ctrl internal parallel resistor (11) 205 k ? vctrl,pd ctrl pin voltage during low consumption (power good) low consumption, ictrl = 0.2 ma 0.2 v veoss ctrl end of soft-start level (10) 1.7 1.8 1.9 v toff characteristics vtoff toff operating range (1) gnd 3.3 v vtoff,fix toff minimum fixed tblank voltage (3) 2v table 5. electrical ch aracteristics (continued) symbol pin parameter test condition min. typ. max. unit
electrical characteristics HVLED001 12/27 docid027333 rev 1 koff toff toff characteristic slope (3) 100 s / v itoffpu toff pull-up current 5 12 20 a vtoff,bias toff internal bias voltage (3) 2.4 v 1. operating conditions not associat ed with specific production test. 2. parameters in tracking group 1. 3. parameters not tested in production. 4. parameter calculated. 5. parameters in tracking group 2. 6. kp parameter includes the overall tolerances of the multiplier block defined as per note 8. 7. parameters in tracking group 3. 8. vhvsu,pk indicates the maximum value of vhvsu. 9. tblank = max {koff ? (vtoff,fix - vtoff)}. 10. parameters in tracking group 4. 11. vctrl,bias/ictrl,bias. table 5. electrical ch aracteristics (continued) symbol pin parameter test condition min. typ. max. unit vcs kp vhvsu vhvsu pk , -------------------------------- v f b v f b r e f , ? ?? or vcs min, , =
docid027333 rev 1 13/27 HVLED001 typical electrical characteristics 27 6 typical electrical characteristics figure 4. graph 1: v cc current consumption ,&& p$ 6zlwfklqj iuhtxhqf\ n+] $0
application information HVLED001 14/27 docid027333 rev 1 7 application information 7.1 operating modes the HVLED001 qr flyback controller is able to operate either as a single stage high power factor (hpf) flyback controller or as a dc/dc fl yback controller in dual stages topologies. its enhanced features are mainly intended to simplify the design and the management of constant current applications (led drivers). application schematics of the two ma in topologies are reported in figure 5 and figure 6 . figure 5. high power factor flyback - constant output current +968 9&& =&' *' &6 )% *1' &75/ +9/(' 5fv 5]fg 5ie &yff &odpslqj ghylfhv '6(& &rxw /(' /(' &9lq )lowhu dqg uhfwlilhu 5vv 72)) &vv 9uhi $0
docid027333 rev 1 15/27 HVLED001 application information 27 figure 6. high power factor flyback ? primary side regulated constant output voltage the HVLED001 has four main operating modes: the start-up mode, active mode, stop mode and low consumption mode. 7.1.1 start-up mode this state is entered to begin the switching acti vity (during application's turn on or exiting from low consumption state). the hvsu is in volved into the mechanism of vcc charging; all other peripherals, except the uvlo and logic supply, are turned off to minimize the start- up time. during this state the ctlr pin is internally pulled to ground. +968 9&& =&' *' &6 )% *1' &75/ +9/(' 5fv 5]fg 5ie &odpslqj ghylfhv '6(& &rxw 9rxw 9rxw &lq )lowhu dqg uhfwlilhu $&b3 72)) &frpsbv 5frpsbv 5vv &vv &yff 5]fgbvx &]fgbvx $0
application information HVLED001 16/27 docid027333 rev 1 figure 7. initial start-up phase 7.1.2 active mode it is the normal operational mode. during this state the external mosfet is driven accordingly to signals coming from the applic ation in order to regulate the desired output parameter in the closed loop (peak current control method). the active mode is exited when abnormal conditions are present or the v cc drops below the v cc,su threshold. the hvsu is inactive during the active mode. 7.1.3 stop mode this state is intended to stop the switching ac tivity without turning off the entire function set, to quickly restart when abnormal or disabling conditions end. during this state the power consumption is not minimized and the soft-start procedure is not enabled. $0
docid027333 rev 1 17/27 HVLED001 application information 27 7.1.4 low consumption mode this state is intended to stop the switchin g activity reducing the power consumption to a minimum level. the soft-start procedure is set to be performed when abnormal or disabling condition is removed. during this state the vcc is kept between vcc, su and vcc,on by the high voltage start-up unit (hvsu) delivering icharge to the output capacitor. note: important: hvsu charges v cc so any other external voltage (including auxiliary winding) must be decoupled using a 1n4148 diode. 7.1.5 soft-start the soft-start phase is entered after the start-up and every time the ic exits from low consumption mode. this phase lasts until the vo ltage at the ctrl pin reaches the ?end of soft-start? level (veoss). the current sense maximum limit is derived from th is voltage, therefore the charging time of a capacitor placed between the ctrl pi n and gnd defines the soft-start time. during this phase some protections (optocoupl er failure protection (ofp), brownout (bo) and analog disable (an_dis) are ignored. 7.2 control loop the control loop is based on the current mode quasi-resonant flyback control scheme and is therefore performed turning off the mosfet wh en the peak of its source current reaches the threshold set by the control loop, and turn ing the mosfet on in correspondence of the resonant valley following the primary side demagnetization input. a detail of the block involved into this scheme is shown in figure 8 . figure 8. control loop blocks *' &6 =&' )% 6 4 5 =&' orjlf 365($ ,)% 9fv 9ieuhi 95()365 +968 ,qsxwyrowdjh vhqvlqj $0
application information HVLED001 18/27 docid027333 rev 1 7.2.1 current sense input the peak of the primary current is read across a shunt resistor placed between the mosfet's source and compared with a threshold equal to: equation 1 where the term vhvsu,pk is the maximum value of the hvsu voltage within around 20 ms and is used to compensate the dependency on the input voltage of the open loop gain transfer function. the gain k p collects all the proportional terms between the hvsu voltage and cs threshold. a leading edge blanking time (leb) is applied after mosfet's turn on. the vcs signal is upper limited to a value that depends on the ctrl voltage and is lower limited to a level defined as: equation 2 v cs,min = v hvsu ? 0.15 a second level ocp threshold is present to temp orarily stop the switching activity in case of inductor saturation. 7.2.2 feedback input the fb pin is intended to be connected direct ly to the collector of the optocoupler that provides the galvanic insulation to the control loop as well as to act as compensation output for the primary side control (psr) loop of the output voltage (see section 7.2.4 ). a suitable rc network can be placed between fb and ground to compensate the control loop. in case of constant output voltage applications, the psr loop can be used to regulate the output voltage saving the seco ndary side error amplifier. the fb voltage is also used as an input parameter for the burst-mode operation described in section 7.2.5 . the pin embeds protection to prevent from the operation with the failed optocoupler and can be pulled to ground to interrupt the switching activity (stop mode). 7.2.3 zero current detection the zero level detection is performed by a trig ger logic that, once armed by a rising voltage, is sensitive to falling edges. t he advanced zcd logic is able to discriminate between the normal operation, output short-circuit or start-up condition. an internal blanking time prevents any triggeri ng signal to activate the mosfet's at the very beginning of the off time, where spurious resonances could be present. as a result, the first falling edge occurring after the blanking time turns on the mosfet. to ensure a proper operation, the transformer has to be designed to guarantee that the inductor's demagnetization time is longer than tblank (at vtoff > vtoff,fix) when the v cs value ( equation 1: ) is higher than 0.3 v (typ.). v cs k p v hvsu v hvsu pk ? ------------------------------- ? v fb v fb ref ? ? ?? ? +
docid027333 rev 1 19/27 HVLED001 application information 27 the toff pin is intended to select the blanking time duration. if the pin is left unconnected a fixed blanking time is provided. the tblank value depends on toff voltage ( figure 9 ). figure 9. tblank voltage vs tblank time (typical) an internal starter provides the triggering si gnal whenever a valid arming signal is not detected. the zcd pin embeds a negative clamp to limit the negative-going current. 7.2.4 primary side regulation feature the zcd pin is also is used as input of the psr error amplifier (e/a). the reference voltage of this loop is interna lly fixed to vref,psr and applied to the non-inverting input of the e/a. the output of such error amplifier is c onnected to the fb pin where the relevant compensation network has to be connected. in a flyback or buck-boost topology the output voltage can be read from the primary side using an auxiliary winding: in th is case the output voltage is obtained using the following equation: equation 3 7%/$1. ?v 972)) 9 $0 vout vref psr n sec n aux -------------- 1 rzcd rfb -------------- + ?? ?? ? ? ? =
application information HVLED001 20/27 docid027333 rev 1 the internal small signal model of the psr e/ a is obtained considering the voltage gain (g v = 73 db) and the gain bandwidth produc t (gbwp = 1 mhz) and is illustrated in figure 10 . figure 10. psr e/a small signal model 7.2.5 burst-mode operation as soon as the fb pin drops below vbm, the burst-mode operating mode is entered. the switching activity is temporar ily interrupted until the fb voltage returns above the vbm value. an internal hysteresis improves the no ise rejection of this feature. the fb biasing current follows the same rules as in the normal operation; therefore the burst-mode operation is either defined by the secondary side error amplifier when an optocoupler is used or by the internal error amplifier if the psr operation is on. an internal biasing mean prevents the fb voltage to drop below disabling thresholds during the inactive state. 7.3 gate driver the output stage, connected to vcc potential and capable of the 300 ma source and the 600 ma sink current, is suitable to drive high current mosfets. the resulting managed power can be greater than 150 w. 7.4 ic supply management the ic's voltage supply is managed by the uv lo circuitry together with the high voltage start-up unit and reference generators. these logics define also supply currents during different operating conditions. &27$ s) 527$ 0? )% $0
docid027333 rev 1 21/27 HVLED001 application information 27 7.4.1 vcc supply management the ic is designed to operate with a range of supply voltage to ensure an optimum gate driving. an active limiting devi ce is embedded to prevent low energy fluctuations to bring the vcc voltage above the technological constraints. both the active mode and the low consumption mo de exhibits very low supply currents in order to meet energy saving regulation. the vcc pin can be driven independently from the hvsu pin's connection, for example when auxiliary supply voltage is present. in this ca se the hvsu pin will be used solely to monitor input voltage. a bulk capacitor, having a capacitance of around 10 f, followed by a ceramic capacitor, having a typical capacitance of 100 nf and connected very tight to the v cc pin, are necessary to properly sustain the vcc voltage during all operating phases. 7.4.2 high voltage start-up high voltage start-up (hvsu) circuitry is primarily intended to provide the start-up current to the vcc pin and maintain the ic responsive during low consumption modes. this structure is able to sustain at least 800 v to avoid any damage in case of a surge or a burst on the stage's input. the overall structure is off until input voltage reaches the vhvsu, start threshold, after that it sources a minimum current (i charge,su) to charge the vcc pin up to vcc,su threshold. this condition prevents the ic from severe damaging effects in case of a short-circuit on the v cc pin. at this v cc voltage a higher current (icharge) is provided to vcc to reach the vcc,on threshold. at this occurrence the active mode is invoked and the hvsu is turned off. during other active mode's phases and the stop mode the hvsu is off. if the low consumption mode is entered, the hvsu unit is turned on. table 6 summarizes the hvsu behavio r in all ic conditions. table 6. hvsu operating modes operating condition (see figure 7 ) vcc range off icharge,su icharge all states if vin < vhvsu,on - x start-up (logic start-up) 0 v ? vcc,su x start-up (ic start-up) vcc,su ? vcc,on x active mode (no switching period) vcc,su ? vcc,max x active mode (switching period) vcc,su ? vcc,max x stop mode vcc,su ? vcc,max x low consumption mode vcc,su vcc,on (rising) x low consumption mode (after the end of entering conditions) vcc,su ? vcc,on x
application information HVLED001 22/27 docid027333 rev 1 7.5 autorestart timer (art) the autorestart timer unit is responsible for t he generation of the protection's intervals and of the restart times after the low consumption mode. a summary of all possible combination of times is described in each protection paragraph. 7.6 protections a comprehensive set of protection s is embedded to ensure a hi gh level of reliability of the final application using a limited number of components. 7.6.1 overcurrent protection (ocp) to prevent any damage to active components in case of inductor's saturation the mosfet is immediately turned off by the fast ocp prot ection. at this occurren ce the ic temporarily enters the stop state for a time equal to tocp. 7.6.2 input overvoltage protection (i-ovp) disturbances of the input voltage like surges or bursts may increase the voltage applied to the transformer primary side. worst, an excessive input voltage could be applied to the application. these occurrences may result into mosfet damage during the off-state when the drain voltage rises to vin plus reflected voltage, eventually above the maximum absolute rating of the mosfet itself. an input voltage higher than vsurge, measured by hvsu structure, immediately stops the ic. if the extra voltage diminishes before tsurge the device restarts immediately without activating the start-up procedure, otherwise the low consumption mode is entered until the input voltage returns below the safety threshold. an internal hysteresis improves the noise rejection of this feature. in the latter ca se the art activates the start-up procedure. 7.6.3 brownout protection (bo) the current sourced by the zcd pin's negative clamp during on time is compared to a minimum value to determine whether the in put voltage is lower than the input range specification (brownout protection). if a valu e lower than ibo for a time longer than tbo, managed by the art, is detected, the ic is stopped for trec and then restarted. when the protection is triggered, the art perf orms the autorelaoding procedure after trec. the brownout protection is active during the active mode, but blanked during the soft-start. 7.6.4 optocoupler failu re protection (ofp) this protection detects either the absence of the optocoupler control (no pull-down) or the overload condition for more than a time equal to tofp and switches off the application putting the device in the low consumption mode . this prevents the output power from rising above excessive values due to the loss of control. the art manages the tofp interval and performs the auto-reloading procedure after trec. the ofp is active during the active mo de, but blanked during the soft-start.
docid027333 rev 1 23/27 HVLED001 application information 27 7.7 disable and monitor feature several disabling means are available to externally disable the ic: 1. driving fb pin low (fb_dis): this occurrence immediately stops the switching activity until the fb voltage returns above the threshold. 2. driving ctrl pin low (ctrl_dis): this occurrence immediately puts the device in the low consumption mode; when the ctlr pin is left free, the internal biasing mean pulls-up the voltage above the threshold entering the soft-start procedure. 3. driving ctrl pin high (an_dis): a ctrl voltage higher than the threshold for a time longer than tdis causes the device to en ter the low consumption mode. the art timer performs an auto-recover procedure after trec. anytime the HVLED001 device enters low consumption, an internal pull-down discharges the soft-start capacitor and resets the soft-start time.
package information HVLED001 24/27 docid027333 rev 1 8 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack specifications, grade definitions a nd product status are available at: www.st.com . ecopack is an st trademark. figure 11. ssop10 package outline 8140761 rev. a
docid027333 rev 1 25/27 HVLED001 package information 27 table 7. ssop10 package mechanical data symbol dimensions (mm) min. typ. max. a 1.75 a1 0.10 0.25 a2 1.25 b 0.31 0.51 c 0.17 0.25 d 4.80 4.90 5 e 5.80 6 6.20 e1 3.80 3.90 4 e 1 h 0.25 0.50 l 0.40 0.90 k 0 8
revision history HVLED001 26/27 docid027333 rev 1 9 revision history table 8. document revision history date revision changes 13-jan-2015 1 initial release.
docid027333 rev 1 27/27 HVLED001 27 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics ? all rights reserved

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